1. Field of the Invention
The invention relates to a power converter, more particularly to a power converter that is implemented with power factor correction capabilities.
2. Description of the Related Art
Typically, a conventional power converter includes a bridge rectifier disposed to receive an alternating current (AC) power signal for outputting a rectified signal, and a power factor corrector (PFC) coupled to the bridge rectifier. The effect of the PFC is to address unwanted harmonic distortion resulting from non-linear characteristics of the bridge rectifier, thereby minimizing the adverse effect of the harmonic distortion on a power factor of the power converter.
FIG. 1 illustrates an exemplary PFC using an average-current-mode control configuration. In operation, a divided rectified voltage (Vrec2) is fed to a computing circuit 91 for obtaining a first value based on a square of root-mean-square (RMS) value of the divided rectified voltage (Vrec2). The computing circuit 91 is also configured to obtain a second value by multiplying the voltage VEAO and the current (IAC), and to obtain a third value through dividing the second value by the first value. The third value is then used to control switching of a transistor (Q) between conducting and non-conducting states. As a result, a current (IL) flowing through an inductor (L) can be modified to have a phase that tracks that of voltage (Vrec1), thereby reducing the harmonic distortion and increasing the power factor of the power converter.
However, implementation of the computing circuit 91 may be relatively burdensome, due to the complexity of the circuits needed for the arithmetic operations, and the number of arithmetic operations involved. Additionally, it is required that the computing circuit 91 have a high linearity, in order to ensure proper handling of signals in various frequency bands.
It is also known that, after being modified by the PFC in FIG. 1, the current (IL) flowing through the inductor (L) may end up having a sawtooth waveform (e.g., as shown by the broken lines in FIG. 2). While the sawtooth waveform may be filtered out using a low-pass filter disposed between the resistors (Rs) and (RM1) (not shown in the drawings), the presence of the low-pass filter introduces a phase delay on a non-inverting input terminal of an amplifier 95, which may offset the effect of the PFC.